Bibliographic Metadata

Negative bias temperature instability and hot-carrier degradation of 130 nm technology transistors including recovery effects / von Gunnar Andreas Rott
Additional Titles
one hundred thirty nanometers
AuthorRott, Gunnar Andreas
Thesis advisorGrasser, Klaus-Tibor
PublishedWien, 2018
Descriptionx, 203 Seiten : Illustrationen, Diagramme
Institutional NoteTechnische Universität Wien, Dissertation, 2018
Zusammenfassung in deutscher Sprache
Document typeDissertation (PhD)
Keywords (DE)MOS Transistoren / Zuverlässigkeit / BTI / heiße Ladungsträger
Keywords (EN)MOS transistors / reliability / BTI / hot carriers
URNurn:nbn:at:at-ubtuw:1-113389 Persistent Identifier (URN)
 The work is publicly available
Negative bias temperature instability and hot-carrier degradation of 130 nm technology transistors including recovery effects [22.49 mb]
Abstract (English)

Metal-oxide-semiconductor field-effect-transistors (MOSFETs) are used in various electronic applications everyday. Compared to bipolar transistors, a very low input current is needed to control the load current. That is why, circuits based on MOSFETs have very low power consumption and it is the main reason why they are used as the basis for a variety of analog and digital applications. On the other hand, MOSFETs can be scaled down to few nanometers and enable a high density of integration. The drawback of this very-large-scale integration (VLSI) is not only the spread of electrical parameters of the fabricated transistors but also their different aging behavior. Two main aging effects, negative and positive bias temperature instability (N/PBTI) as well as hot-carrier degradation (HCD), change the initial electrical parameters of each single transistor in the circuit based on its control and load profile. To predict the drift of each parameter, reliability measurement data is recorded and physics-based models are developed. The prediction of the parameter drift is crucial to simulate and understand the behavior of the circuit over lifetime. At this, the end of life of an electronic circuit ranges between few years for consumer electronics up to several decades for automotive, aerospace and military applications. This work focuses on the measurement and analysis of HCD, NBTI, including the recovery effect, and their interplay. In order to record HCD reliability data a standard lab setup has been used. During NBTI measure-stress-measure (MSM) sequences recovery effects are expected. Therefore, a special measurement device with an ultra-short delay about 1 s between the stress and measurement phase was built-up and has been employed to preserve the information of fast recovering traps at the Si-SiO2 interface and in the oxide. That is why, all tests covering stress signals for mixed HCD and NBTI stress were also performed with the ultra-fast measurement equipment. H

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