Quasi-one-dimensional nanowires have attracted tremendous attention as a playground to study fundamental mesoscopic effects such as quantum confinement or single-electron transistor phenomena, and potential technological applications, enabling extraordinary progress for nanoscale electronics, sensors, photonic devices, solar cells, as well as catalysis and life science. Because of the relatively small lateral nanowire dimensions it is possible that stress induced by lattice mismatches at a hetero-interface can be released within a few atomic layers without causing damage to the inner crystal structure of the wire. Thus, it is possible to produce devices with heterostructures within one wire as well as between nanowire and substrate.
The main focus of this diploma thesis is on the investigation of epitaxial silicon nanowire growth on a GaAs substrate and the electrical characterization of the interface. To the best of my knowledge no work on this topic was published before. The great importance of GaAs for optoelectronics and the good controllability of Si nanowires synthesis make this combination that interesting. Another reason for the research on this material combination at the nanoscale is the fact, that layer growth of these Si-GaAs Systems is very complex due to the great lattice mismatch.
At the beginning a short introduction into the field of research is given. The theoretical part contains growth process concepts as well as a short review on the material properties. The third chapter contains experimental investigations of nanowire synthesis which is the main part of the thesis. The importance of the substrate cleaning is shown and the influences of different wet etching processes for the VLS process in an low pressure chemical vapor deposition reactor growth with silane as precursor gas are explored. Gold is used as a catalyst for this work and is either deposited on the substrate in the form of nanoparticles dissolved either in isopropyl alcohol or in water or sputtered onto the substrate. The influence of the solvent is investigated and the thickness of the gold layer optimized. It will be shown that the growth-temperature for epitaxial growth of nanowires on a GaAs substrate has to be higher than for Si substrates but too high temperatures will cause decomposition of the substrate. Also the best parameters for growth will regard to temperature pressure and gas flow will be determined. To perform electrical measurements on the interface between substrate and wire the device has to be covered with an isolating layer and individual nanowires have to be contacted with Ti/Au pads. The last part of the work includes the results of the electrical characterization. Current-voltage measurements are performed at room temperature and also at low temperatures. The results are discussed in the last chapter.