Hardware-in-the-Loop (HiL) simulation is a testing technique in which the environment of an (embedded) System-Under-Test (SUT) is simulated by an assigned HiL simulator. Thereby, the SUT interacts with the HiL simulator via the SUT's interface with its environment. The interaction between the SUT and the HiL simulator takes place in real time and is constrained by the temporal properties of the SUT. In the case where the SUT is a distributed system, consisting of several nearly-independent computers interacting with their environment in a collaborative way, the set-up of an HiL simulation is a non-trivial task requiring well-designed linking interfaces of the HiL simulator to enable predictable test runs.
This thesis proposes an approach towards the temporal decoupling of environmental simulation of the HiL simulator and the SUT, by using a time-triggered connection system acting as a temporal firewall. Using such an approach, it can be guaranteed that information flow between the HiL simulator and the SUT (and vice versa) is bound to a priori known latency and jitter. Furthermore, timing violations of an HiL simulation can be deterministically diagnosed and actions, avoiding detrimental consequences of such timing violations, can be initiated.
In contrast to traditional solutions to interfacing between the SUT and the HiL simulator, the presented approach allows temporal laxity of the HiL simulator, i. e., the execution of the simulation model (e. g., a Matlab/Simulink model) is individually performed by assigned components of a distributed HiL simulator while different components of the same HiL simulator are responsible for timely interfacing with the SUT.
The actual physical coupling of the SUT and the HiL simulator is established via an arbitrary transducer interface. This interface can be implemented using a physical transducer, a (standardized) digital transducer interface, or a so-called Smart Virtual Transducer (SVT) that mimics the behavior of a physical transducer. The thesis provides an outline of a generic HiL simulation framework, based on SVTs. The proposed framework is exemplarily applied to the verification of integrated systems.