This work presents a novel concept for a hardware-based virtualization solution, to provide spatial separation between multiple applications on a Cyberphysical System-on-Chip. This Cyberphysical System-on-Chip is able to sense its underlying substrate and adapt to degradation effects in it. The presented virtualization solution will support the Cyberphysical System-on-Chip to adapt its architecture, to meet the performance requirements of its applications, by providing the necessary means to relocate applications to processors, which can provide the performance. The solution introduces a paging approach within a Network-on-Chip interface, known from Memory Management Units in processors, and a configuration scheme, which transforms the network to a virtualization layer within the chip. This approach will provide the means to virtualize entire operating systems and a hardware partitioning scheme to run them.